京东 11.11 红包
SOC设计之外设接口【uart】【spi】【iic】【io bus】
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SPI 接口驱动12-bit ADC及其verilog实现
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Advanced SOC Design 2024文件及PPT分享
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serdes_Advanced SOC Design
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Static Timing Analysis I
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AXI Bus Introduction
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SOC - Reset - Advanced SOC Design 2024
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快速傅立叶变换（FFT）在FPGA上实现频率检测电路
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DRAM Introduction
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SOC - IO Part I - Advanced SOC Design
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SPI接口的环境光传感器的应用与verilog实现
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Timer-DMA-GPIO介绍
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基于FPGA的功率分析仪与FFT, CORDIC，嵌入式处理器和Matlab GUI:第1部分:ADC和FFT
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AXI Bus Optimization
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SOC - IO Part II - Advanced SOC Design
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Synopsys IC Compiler II Flow Introduction
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SOC Clock Part II - Advanced SOC Design 2024
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（3）scaps-1D改变材料属性进行批量化处理
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NTU Final Project - Acceleration of Attention block in Transformer
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Cache System
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Chip Design Flow Part I - Front-end design flow - Advanced SOC Design
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Verilog模块的基本结构
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Synthesis Part I
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IC Testing - Boundary Scan - Advanced SOC Design 2024
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Direct Memory Access (DMA)
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FSIC Architecture - Advanced SOC Design 2024
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以太网的基础和PHY的详细介绍
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I3C基础介绍
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IC Testing - BIST - Advanced SOC Design 2024
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CAN Bus_ Serial Communication -工作原理简介
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Synthesis Part II
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wishbone Bus
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Lab Catapult-HLS Workbook Advanced SOC Design 2024
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Step-by-Step Lab1_ FIR Part II - Advanced SOC Design 2024
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Advanced Verification - Low power UPF Advanced SOC Design
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使用AXI DMA (Vivado)将数据从FPGA传输到DDR
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SERDES 如何在 FPGA、高速串行 TX _ RX 中工作
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PCI vs PCIe_ 差异对比
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Synthesis Simulation Mismatch
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USB Type C 基础介绍
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part 24 _Verilog存储器建模RAM